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Autor(en): 
  • Paul Ampadu
  • Qiaoyan Yu
  • Transient and Permanent Error Control for Networks-on-Chip 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 3 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   i.d.R. innert 7-14 Tagen versandfertig
    Veröffentlichung:  November 2011  
    Genre:  Naturwissensch., Medizin, Technik 
     
    B / Circuits and Systems / Electronic circuits / Electronic Circuits and Systems / Electronics / Electronics and Microelectronics, Instrumentation / Electronics engineering / engineering
    ISBN:  9781461409618 
    EAN-Code: 
    9781461409618 
    Verlag:  Springer EN 
    Einband:  Gebunden  
    Sprache:  English  
    Dimensionen:  H 235 mm / B 155 mm / D  
    Gewicht:  430 gr 
    Seiten:  160 
    Illustration:  XII, 160 p. 
    Zus. Info:  EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025. 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    This book addresses reliability and energy efficiency of on-chip networks using a configurable error control coding (ECC) scheme for datalink-layer transient error management. The method can adjust both error detection and correction strengths at runtime by varying the number of redundant wires for parity-check bits. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.Includes a complete survey of error control methods for reliable networks-on-chip, evaluated for reliability, energy and performance metrics; Provides analysis of error control in various network-on-chip layers, as well as presentation of an innovative multi-layer error control coding technique;Presents state-of-the-art solutions to address simultaneously reliability, energy and performance;Describes configurable error management solutions and their hardware implementation details for variable noise conditions; Provides details of a flexible and parallel NoC simulator and corresponding simulation setup to achieve the reported results.  
      
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