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Autor(en): 
  • Wolfgang Günther
  • Rolf Drechsler
  • Towards One-Pass Synthesis 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 3 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   Auf Bestellung (Lieferzeit unbekannt)
    Veröffentlichung:  Dezember 2010  
    Genre:  EDV / Informatik 
     
    Artificial Intelligence / B / computer science / Computer-aided engineering / Computer-Aided Engineering (CAD, CAE) and Design / Development / Electrical and Electronic Engineering / Electrical Engineering
    ISBN:  9781441952790 
    EAN-Code: 
    9781441952790 
    Verlag:  Springer EN 
    Einband:  Kartoniert  
    Sprache:  English  
    Dimensionen:  H 240 mm / B 160 mm / D  
    Gewicht:  340 gr 
    Seiten:  182 
    Illustration:  X, 182 p. 
    Zus. Info:  EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025. 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e. g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits are often far from being optimal and insufficient regarding the optimization criteria, like area and delay, several iterations of the complete design process have to be carried out to get high quality results. This is a very time consuming and costly process. For this reason, some years ago the idea of one-pass synthesis came up. There were two main approaches how to guarantee that a design got "first time right" : 1. Combining levels that were split before, e. g. to use layout information already during the logic synthesis phase. 2. Restricting the optimization in one level such that it better fits to the next one. So far, several approaches in these two directions have been presented and new techniques are under development. In this book we describe the new paradigm that is used in one-pass synthesis and present examples for the two techniques above.
      



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