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Weitersagen:


Herausgeber: 
  • Axel Jantsch
  • Hannu Tenhunen
  • Networks on Chip 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 3 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   Auf Bestellung (Lieferzeit unbekannt)
    Veröffentlichung:  Januar 2003  
    Genre:  EDV / Informatik 
     
    Architecture, Computer / B / Computer architecture & logic design / computer science / Computer System Implementation / Computer-Aided Design (CAD) / Computer-aided engineering / Computer-Aided Engineering (CAD, CAE) and Design
    ISBN:  9781402073922 
    EAN-Code: 
    9781402073922 
    Verlag:  Springer EN 
    Einband:  Gebunden  
    Sprache:  English  
    Dimensionen:  H 235 mm / B 155 mm / D 22 mm 
    Gewicht:  1370 gr 
    Seiten:  303 
    Illustration:  VIII, 303 p. 
    Zus. Info:  EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025. 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

      



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