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Autor(en): 
  • Alan Gibbons
  • David Flynn
  • Rob Aitken
  • Kaijian Shi
  • Low Power Methodology Manual: For System-on-Chip Design 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 3 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   Auf Bestellung (Lieferzeit unbekannt)
    Veröffentlichung:  Juli 2007  
    Genre:  Naturwissensch., Medizin, Technik 
     
    C / Circuits and Systems / computer hardware / Computerhardware / Electrical and Electronic Engineering / Electrical Engineering / Electronic circuits / Electronic Circuits and Systems
    ISBN:  9780387718187 
    EAN-Code: 
    9780387718187 
    Verlag:  Springer EN 
    Einband:  Gebunden  
    Sprache:  English  
    Serie:  Integrated Circuits and Systems  
    Dimensionen:  H 235 mm / B 155 mm / D 24 mm 
    Gewicht:  1380 gr 
    Seiten:  300 
    Illustration:  XVI, 300 p. 
    Zus. Info:  EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025. 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    "Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach."

                                                       Richard Goering , Software Editor, EE Times

    "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion."

                                                        Sujeeth Joseph , Chief Architect - Semiconductor &
                                                       Systems Solutions Unit, Wipro Technologies

    "The LPMM enables broader adoption of aggressive power management techniques  based  on extensive experience and silicon example with real data that every SOC designer can use tomeet the difficulties faced in managing the power issues in deep submicron designs"

                                                     Anil Mankar , Sr VP  Worldwide Core Engineering 
                                                     and Chief Development Officer, Conexant Systems Inc.

    "Managing power, at 90nm and below, introduces significant challenges to design flow.  The LPMM is a timely and immediately useful book that shows how combination of tools, IP and methodology can be used together to address power management."

                                                     Nick Salter, Head of Chip Integration, CSR plc.

    ABOUT THE AUTHORS:

    Michael Keating is a Synopsys Fellow in the company's Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design.

    David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology.

    Robert Aitken is an ARM R&D Fellow. His areas of responsibility includememory architecture, design for testability and design for manufacturability.

    Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design.

    Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.

      



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