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Autor(en): 
  • Rezaur Rahman
  • Intel Xeon Phi Coprocessor Architecture and Tools: The Guide for Application Developers 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 2 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   i.d.R. innert 5-10 Tagen versandfertig
    Veröffentlichung:  November 2013  
    Genre:  EDV / Informatik 
     
    B / computer hardware / Computer input-output equipment / Hardware and Maker / Maker / Professional and Applied Computing
    ISBN:  9781430259268 
    EAN-Code: 
    9781430259268 
    Verlag:  Apress 
    Einband:  Kartoniert  
    Sprache:  English  
    Dimensionen:  H 229 mm / B 191 mm / D 13 mm 
    Gewicht:  431 gr 
    Seiten:  232 
    Zus. Info:  Paperback 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    Intel® Xeon PhiT Coprocessor Architecture and Tools: The Guide for Application Developers provides developers a comprehensive introduction and in-depth look at the Intel Xeon Phi coprocessor architecture and the corresponding parallel data structure tools and algorithms used in the various technical computing applications for which it is suitable. It also examines the source code-level optimizations that can be performed to exploit the powerful features of the processor.

    Xeon Phi is at the heart of world's fastest commercial supercomputer, which thanks to the massively parallel computing capabilities of Intel Xeon Phi processors coupled with Xeon Phi coprocessors attained 33.86 teraflops of benchmark performance in 2013. Extracting such stellar performance in real-world applications requires a sophisticated understanding of the complex interaction among hardware components, Xeon Phi cores, and the applications running on them.

    In this book, Rezaur Rahman, anIntel leader in the development of the Xeon Phi coprocessor and the optimization of its applications, presents and details all the features of Xeon Phi core design that are relevant to the practice of application developers, such as its vector units, hardware multithreading, cache hierarchy, and host-to-coprocessor communication channels. Building on this foundation, he shows developers how to solve real-world technical computing problems by selecting, deploying, and optimizing the available algorithms and data structure alternatives matching Xeon Phi's hardware characteristics. From Rahman's practical descriptions and extensive code examples, the reader will gain a working knowledge of the Xeon Phi vector instruction set and the Xeon Phi microarchitecture whereby cores execute 512-bit instruction streams in parallel.

      



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