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Lieferstatus:	i.d.R. innert 14-24 Tagen versandfertig
Veröffentlichung:	Februar 1995
Genre:	Naturwissensch., Medizin, Technik
ISBN:	9780792395522
EAN-Code:	9780792395522
Verlag:	Springer Nature Singapore
Einband:	Gebunden
Sprache:	English
Serie:	#307 - The Springer International Eng
Dimensionen:	H 234 mm / B 156 mm / D 16 mm
Gewicht:	553 gr
Seiten:	249
Bewertung:	Titel bewerten / Meinung schreiben

Inhalt:

It is recognized that formal design and verification methods are an important requirement for the attainment of high quality system designs. The field has evolved enormously during the last few years, resulting in the fact that formal design and verification methods are nowadays supported by several tools, both commercial and academic. If different tools and users are to generate and read the same language then it is necessary that the same semantics is assigned by them to all constructs and elements of the language. The current IEEE standard VHDL language reference manual (LRM) tries to define VHDL as well as possible in a descriptive way, explaining the semantics in English. But rigor and clarity are very hard to maintain in a semantics defined in this way, and that has already given rise to many misconceptions and contradictory interpretations. Formal Semantics for VHDL is the first book that puts forward a cohesive set of semantics for the VHDL language. The chapters describe several semantics each based on a different underlying formalism: two of them use Petri nets as target language, and two of them higher order logic. Two use functional concepts, and finally another uses the concept of evolving algebras. Formal Semantics for VHDL is essential reading for researchers in formal methods and can be used as a text for an advanced course on the subject.