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Autor(en): 
  • Robert W. Brodersen
  • Thomas D. Burd
  • Energy Efficient Microprocessor Design 
     

    (Buch)
    Dieser Artikel gilt, aufgrund seiner Grösse, beim Versand als 3 Artikel!


    Übersicht

    Auf mobile öffnen
     
    Lieferstatus:   Auf Bestellung (Lieferzeit unbekannt)
    Veröffentlichung:  November 2012  
    Genre:  Naturwissensch., Medizin, Technik 
     
    C / Circuits and Systems / Computer Architecture / Computer architecture and logic design / Computer-Aided Design (CAD) / Computer-aided engineering / Computer-Aided Engineering (CAD, CAE) and Design / Electrical and Electronic Engineering
    ISBN:  9781461352822 
    EAN-Code: 
    9781461352822 
    Verlag:  Springer EN 
    Einband:  Kartoniert  
    Sprache:  English  
    Dimensionen:  H 235 mm / B 155 mm / D  
    Gewicht:  569 gr 
    Seiten:  357 
    Illustration:  XII, 357 p. 
    Zus. Info:  EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025. 
    Bewertung: Titel bewerten / Meinung schreiben
    Inhalt:
    This work began in 1995 as an outgrowth of the InfoPad project which showed us that in order to reduce the energy consumption of a portable multimedia terminal that something had to be done about the consumption of the microprocessor subsystem. The design of the InfoPad attempted to reduce the requirements of this general pur pose processor by moving the computation into the network or by the use of highly optimized integrated circuits, but in spite of these efforts it still was a major consumer of energy. The reasons for this became apparent as we determined that the energy required to perform a function in dedicated hardware could be several orders of magnitude lower than that consumed in the InfoPad microprocessor. We therefore set out on a full fledged attack on all aspects of the microprocessor energy consumption [1 J. After considerable analysis it became clear that though better circuit design and a stream lined architecture would assist in our goal of energy reduction, that the biggest gains were to be found by operating at reduced voltages. For the busses and VO this could be accomplished without significant degradation of the processor performance, but this was not a straightforward solution when applied to the core of the processor sub system (CPU and memory).
      



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