Übersicht			Auf mobile öffnen

Lieferstatus:	Auf Bestellung (Lieferzeit unbekannt)
Veröffentlichung:	Januar 2019
Genre:	Naturwissensch., Medizin, Technik
	B / Circuits and Systems / Computer architecture & logic design / Electronic circuits / Electronic Circuits and Devices / Electronic Circuits and Systems / Electronic devices & materials / Electronics# circuits & components / engineering / Microprocessors / Processor Architectures / Rechnerarchitektur und Logik-Entwurf mehr...
ISBN:	9789811341847
EAN-Code:	9789811341847
Verlag:	Springer EN
Einband:	Kartoniert
Sprache:	English
Serie:	Computer Architecture and Design Methodologies
Dimensionen:	H 235 mm / B 155 mm / D
Gewicht:	285 gr
Seiten:	165
Illustration:	XIV, 165 p. 73 illus., 68 illus. in color., schwarz-weiss Illustrationen, farbige Illustrationen
Zus. Info:	EUDR exemption - product or manufacturing materials placed on the market prior to 31.12.2025.
Bewertung:	Titel bewerten / Meinung schreiben

Inhalt:

This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems.