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Lieferstatus:	i.d.R. innert 5-10 Tagen versandfertig
Veröffentlichung:	Dezember 2011
Genre:	EDV / Informatik
ISBN:	9784431680833
EAN-Code:	9784431680833
Verlag:	Springer Japan
Einband:	Kartoniert
Sprache:	English
Dimensionen:	H 244 mm / B 170 mm / D 22 mm
Gewicht:	688 gr
Seiten:	400
Bewertung:	Titel bewerten / Meinung schreiben

Inhalt:

The proceedings of the fifth TRON symposium presented here cover all aspects of the TRON project, which aims at establishing the new computer architecture for the 1990s. The papers review the current status of development of TRON as well as its various subprojects and examine future trends. ITRON, BTRON, CTRON, MTRON, and TRON VLSI CPU chips are described. This volume gives an analysis, both generally and in depth, of computer systems of the next decade. The TRON concept aims at the creation of a new and complete environment beneficial to both computer and mankind. It has a very wide scope and great diversity. As it includes the open architecture concept and as the TRON machine should be able to work with various foreign languages, the TRON is targetted to be used internationally. The project's long-term objective is to design and develop the highly functionally distributed system (HFDS). In order to achieve this final goal, design concepts, system architecture, interface definitions, and real implementation methods have been vigorously studied. The core of the TRON computer architecture, the 32-bit VLSI CPU, has been designed and manufactured for sampling. ITRON has been commercialized and has many users now. Prototype systems based on BTRON and CTRON are being implemented. The research on MTRON, i.e. to connect many intelligent objects together in order to build HFDS, has proceeded steadily. One important feature of the TRON architecture is to allow independent and yet compatible implementation of TRON-based systems. The open and accessible interface definitions of various layers of the computer system architecture are very important. One good example of independent, compatible implementation is TRON VLSI CPU. Several manufacturers have separately developed VLSI CPU, and yet these chips assure the operation of the same binary instruction. The interface definitions will be available to the public in accordance with the spirit of the TRON project.