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A Faster GR(1) Synthesis Algorithm: From a formal specification to a hardware circuit
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| With the invention of computers, the desire for robust and accurate solutions arose. There are different approaches or techniques to achieve this goal - like carefully developing and testing the solution upon a specification written in any natural language, or using a formal language which is well defined and doesn¿t lead to misunderstandings. And with the introduction of formal languages, also the possibility of computerized testing or even synthesis of such systems evolved. But subsequently there are different problems, one is that it is not very easy to write a formal specification at all that is complete and unambiguous. Additionally a great problem is that the algorithms currently known need a lot of time and memory for execution, even for rather simple specifications. This master thesis addresses the second problem, trying to accelerate the calculation of a solution for such a specification. |
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